https://www.kernel.org/doc/html/latest/ ... n/mds.html
Subsequently, I added MDS=full,nosmt to boot parameter, as directed.
DMESG log below.
Code: Select all
[ 0.133686] Spectre V1 : Mitigation: usercopy/swapgs barriers and __user pointer sanitization
[ 0.133687] Spectre V2 : Mitigation: Full generic retpoline
[ 0.133688] Spectre V2 : Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch
[ 0.133688] Spectre V2 : Enabling Restricted Speculation for firmware calls
[ 0.133689] Spectre V2 : mitigation: Enabling conditional Indirect Branch Prediction Barrier
[ 0.133690] Spectre V2 : User space: Mitigation: STIBP via seccomp and prctl
[ 0.133691] Speculative Store Bypass: Mitigation: Speculative Store Bypass disabled via prctl and seccomp
[ 0.133693] SMT: disabled
[ 0.133693] SRBDS: Vulnerable: No microcode
[ 0.133694] MDS: Mitigation: Clear CPU buffers
[ 0.133959] Freeing SMP alternatives memory: 12K
[ 0.134489] smpboot: CPU0: Intel(R) Core(TM) i3-7100U CPU @ 2.40GHz (family: 0x6, model: 0x8e, stepping: 0x9)
[ 0.134553] Performance Events: PEBS fmt3+, Skylake events, 32-deep LBR, full-width counters, Intel PMU driver.
[ 0.134558] ... version: 4
[ 0.134559] ... bit width: 48
[ 0.134559] ... generic registers: 4
[ 0.134560] ... value mask: 0000ffffffffffff
[ 0.134561] ... max period: 00007fffffffffff
[ 0.134561] ... fixed-purpose events: 3
[ 0.134562] ... event mask: 000000070000000f
[ 0.134595] rcu: Hierarchical SRCU implementation.
[ 0.134647] smp: Bringing up secondary CPUs ...
[ 0.134700] x86: Booting SMP configuration:
[ 0.134701] .... node #0, CPUs: #1 #2 #3
[ 0.139699] smp: Brought up 1 node, 2 CPUs
[ 0.139701] smpboot: Max logical packages: 2
[ 0.139702] smpboot: Total of 2 processors activated (9600.00 BogoMIPS)
